TY  - BOOK
AU  - Palnitkar, Samir
TI  - Verilog HDL : A Guide to Digital Design and Synthesis
U1  - 621.39 
PY  - 2013///
CY  - New Delhi
PB  - Pearson Education Asia
KW  - Electronics & Communication Engg
KW  - M. Tech (VLSI)
ER  -